Continuous Twist Irregularity Tester

The irregularity and total irregularity of Eulerian graphs

For a graph G, the irregularity and total irregularity of G are defined as irr(G)=∑_(uv∈E(G))〖|d_G (u)-d_G (v)|〗 and irr_t (G)=1/2 ∑_(u,v∈V(G))〖|d_G (u)-d_G (v)|〗, respectively, where d_G (u) is the degree of vertex u. In this paper, we characterize all ‎connected Eulerian graphs with the second minimum irregularity, the second and third minimum total irregularity value, respectively.

A blind spot tester.

Uw Vlsi Chip Tester

We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple Macintosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C ...

Bit Error Rate Tester

Preliminary -The BERTScope BSX-series Bit Error Rate Tester introduces a receiver test platform capable of supporting emerging Gen4 standards and beyond. With the addition of powerful data processing and internal Tx equalization, the BERTScope supports protocol-based handshaking and synchronization with your device under test (DUT), including interactive link training at data rates up to 32 Gb/...

Bit Error Rate Tester

Key performance specifications Up to 1.6 Gb/s Pattern Generator/Error detector for fast, accurate characterization of digital communications signaling systems PRBS or 8 Mb user-defined patterns provide the versatility to debug or verify any combination of digital signaling ANSI jitter measurements (RJ, DJ, and TJ) to measure the impact of random and deterministic jitter on the total jitter at B...